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Computer Fundamentals & Architecture

DSSSB TGT CS — Section B P1 (Rank 6). Concise MCQ-ready notes.


1. Hardware vs Software

HardwareSoftware
Physical components (CPU, RAM, HDD, keyboard)Programs & data instructions
TangibleIntangible
Examples: motherboard, monitorOS, apps, drivers

Firmware: software embedded in hardware (ROM) — e.g., BIOS/UEFI.


2. Input / Output Devices

Input: keyboard, mouse, scanner, mic, webcam, joystick, barcode reader, touchscreen (also output)

Output: monitor, printer, speaker, projector

Both (I/O): touchscreen, network NIC, external drive

Trap: Soft copy = screen; hard copy = printout.


3. Memory Hierarchy (fast/small/expensive → slow/large/cheap)

Registers → Cache (L1/L2/L3) → RAM (Main) → Secondary (HDD/SSD) → Offline (tape/optical)
LevelRole
RegistersInside CPU; fastest; very small
CacheHolds frequently used data/instructions
RAMMain memory; volatile; working programs
ROMNon-volatile; boot firmware etc.
SecondaryPermanent storage; large capacity

Volatile: RAM loses data on power off. Non-volatile: ROM, HDD, SSD, flash.

ROM variants (names for MCQs)

  • PROM, EPROM, EEPROM, Flash (electrically erasable)

4. Storage Units

UnitSize
Bit0 or 1
Nibble4 bits
Byte8 bits
KB1024 B (binary) / sometimes 1000 (SI)
MB1024 KB
GB1024 MB
TB1024 GB
PB1024 TB

Trap: Exam often uses 1024 (2¹⁰). 1 Byte = 8 bits.


5. Types of Software

TypePurposeExamples
SystemManage hardware & platformOS, device drivers, firmware
ApplicationEnd-user tasksWord processor, browser, games
UtilityMaintenance / supportAntivirus, disk cleanup, backup, zip

Middleware (extra): software between OS and apps (exam occasional).


6. Language Translators

TranslatorRole
AssemblerAssembly → machine code
CompilerHLL entire program → machine/bytecode before run
InterpreterHLL line-by-line / statement execution
LinkerCombines object files
LoaderLoads program into memory for execution
CompilerInterpreter
Whole program translation firstTranslates while executing
Errors shown after compile phaseStops at first runtime error often
Usually faster execution after compileEasier debugging / portability feel

7. Generations of Computers (brief)

GenEra cueTechnology
1st1940s–50sVacuum tubes
2nd1950s–60sTransistors
3rd1960s–70sICs
4th1970s–Microprocessors
5thPresent conceptAI, ULSI, parallel / intelligent systems

8. CPU Components

PartFunction
ALUArithmetic & logic operations
CUControl Unit — directs operations, fetch/decode
RegistersTiny fast storage (PC, IR, ACC, MAR, MDR…)

Common registers

  • PC (Program Counter): address of next instruction
  • IR (Instruction Register): current instruction
  • ACC (Accumulator): ALU results
  • MAR / MDR: memory address / data registers

Instruction cycle: Fetch → Decode → Execute (→ Store)


9. von Neumann Architecture

  • Shared memory for instructions and data
  • Sequential execution via program counter
  • Components: CPU, memory, I/O, buses
  • Bottleneck: single bus/memory path for code & data (von Neumann bottleneck)
  • Contrast idea: Harvard — separate instruction & data memories/paths

10. Buses

BusCarries
Data busActual data (bidirectional typically)
Address busMemory/I/O addresses (CPU → memory; width → addressable space)
Control busControl signals (read/write, interrupt, clock…)

11. I/O Techniques

MethodIdea
Programmed I/OCPU waits/polls device continuously
Interrupt-drivenDevice interrupts CPU when ready
DMADirect Memory Access — device↔memory transfer with minimal CPU

Trap: DMA frees CPU from byte-by-byte transfer; DMA controller manages transfer.


12. Secondary Storage

TypeNotes
HDDMagnetic platters; cheaper/GB; mechanical
SSDFlash memory; faster, shock-resistant, costlier/GB
OpticalCD / DVD / Blu-ray
Flash drivesUSB pen drives, memory cards
Magnetic tapeBackup / archive; sequential

13. Motherboard & Ports

Motherboard: main PCB connecting CPU, RAM slots, chipset, expansion slots, power connectors, ports.

Common ports / interfaces

  • USB, HDMI, VGA/DisplayPort, Ethernet (RJ-45), audio jack, Thunderbolt
  • Legacy: PS/2, serial, parallel (older MCQs)
  • Internal: SATA, PCIe, M.2

14. Cloud Computing Types (brief)

ModelYou manage roughlyProvider gives
IaaSOS, apps, dataVirtual machines, storage, network
PaaSApps & dataRuntime, middleware, OS
SaaSMostly usage/configFull application (email, CRM)

Deployment: public, private, hybrid, community.


15. Firmware: BIOS / UEFI

BIOSUEFI
Older firmware interfaceModern replacement
16-bit limitations historicallyRicher UI, larger disks (GPT), secure boot
POST + boot loader handoffSame role, enhanced features
  • Stored in non-volatile chip on motherboard
  • Initializes hardware (POST) and starts boot process

Quick traps checklist

  1. RAM volatile; ROM/secondary non-volatile.
  2. Cache sits between registers and RAM in hierarchy.
  3. 1 Byte = 8 bits; KB often 1024 bytes in exams.
  4. Compiler = whole program; interpreter = execute while translating.
  5. ALU computes; CU controls.
  6. von Neumann: shared memory for code & data.
  7. Address bus width → max addressable memory.
  8. DMA = memory↔device without constant CPU babysitting.
  9. SSD ≠ optical; HDD = magnetic.
  10. IaaS / PaaS / SaaS = increasing abstraction toward apps.