Digital Electronics — Practice MCQs (DSSSB TGT CS)
40 original questions. Conversions and gate reasoning included.
1. The binary number 1101 equals which decimal value?
- A) 11
- B) 12
- C) 13
- D) 14
2. Decimal 25 converted to binary is:
- A) 11001
- B) 10101
- C) 11010
- D) 10011
3. Hexadecimal AF equals which decimal?
- A) 165
- B) 175
- C) 185
- D) 195
4. Binary 101011 grouped for octal becomes:
- A) 53₈
- B) 45₈
- C) 63₈
- D) 35₈
5. Which is equivalent to hex digit C?
- A) 1100₂
- B) 1010₂
- C) 1110₂
- D) 1001₂
6. 1’s complement of 1011000 is:
- A) 0100111
- B) 0101000
- C) 1011001
- D) 0100110
7. 2’s complement of 0101 (4-bit) is:
- A) 1010
- B) 1011
- C) 1101
- D) 0110
8. In 8-bit 2’s complement, the range is:
- A) −127 to +128
- B) −128 to +127
- C) 0 to 255 only as signed
- D) −255 to +255
9. According to De Morgan, (A + B)′ equals:
- A) A′ + B′
- B) A′ · B′
- C) A · B
- D) (A · B)′′
10. Which law states A + AB = A?
- A) Distributive
- B) Commutative
- C) Absorption
- D) Associative
11. Output of a 2-input XOR is 1 when:
- A) Both inputs are 0
- B) Both inputs are 1
- C) Inputs are different
- D) Always
12. A NAND gate output is 0 only when:
- A) Any input is 0
- B) All inputs are 1
- C) All inputs are 0
- D) Inputs differ
13. Which gates are functionally complete (universal) by themselves?
- A) AND and OR only
- B) XOR only
- C) NAND and also NOR
- D) XNOR only
14. XNOR output is 1 when:
- A) Inputs are equal
- B) Inputs differ
- C) Only A is 1
- D) Never
15. Boolean A + 1 equals:
- A) A
- B) 0
- C) 1
- D) A′
16. Canonical SOP uses:
- A) Maxterms only
- B) Minterms (products) ORed
- C) Only XOR terms
- D) Only NOR gates
17. In a truth table, minterms correspond to rows where output is:
- A) 0
- B) 1
- C) X only
- D) Always don’t-care
18. Half adder Sum and Carry are:
- A) AND and OR
- B) XOR and AND
- C) OR and XOR
- D) NAND and NOR
19. A full adder has how many inputs?
- A) 1
- B) 2
- C) 3
- D) 4
20. Full adder Sum expression is:
- A) A · B · Cin
- B) A ⊕ B ⊕ Cin
- C) A + B + Cin
- D) (A + B)′
21. Basic SR latch has an invalid/forbidden combination when:
- A) S=0, R=0
- B) S=1, R=0
- C) S=0, R=1
- D) S=1, R=1
22. For a JK flip-flop, J=1 and K=1 causes:
- A) Set only
- B) Reset only
- C) Toggle
- D) Invalid always
23. A D flip-flop on the active clock edge:
- A) Toggles always
- B) Sets Q = D
- C) Ignores D
- D) Requires J and K
24. A T flip-flop with T=0 will:
- A) Always toggle
- B) Hold previous state
- C) Reset forcibly to 0
- D) Set forcibly to 1
25. Race condition in latches mainly refers to:
- A) Faster fibre than copper
- B) Unpredictable output due to timing/feedback races
- C) Battery failure
- D) Wrong number base
26. An 8:1 multiplexer needs how many select lines?
- A) 2
- B) 3
- C) 4
- D) 8
27. A demultiplexer has:
- A) Many inputs, one output
- B) One input, many outputs
- C) Equal inputs and outputs always 1
- D) No select lines ever
28. A 3-to-8 decoder has:
- A) 3 outputs, 8 inputs
- B) 8 outputs, 3 inputs
- C) 3 inputs, 3 outputs
- D) 8 inputs, 8 outputs
29. An encoder typically converts:
- A) Binary code to one-hot active line
- B) Active input line to binary code
- C) Analog sound to light
- D) Packets to frames only
30. Octal number 76₈ in decimal is:
- A) 62
- B) 70
- C) 64
- D) 56
31. Which is NOT a Boolean identity?
- A) A · A′ = 0
- B) A + A′ = 1
- C) A + 0 = A
- D) A · 1 = 0
32. Gate that implements logical multiplication is:
- A) OR
- B) AND
- C) NOT
- D) XOR
33. The binary equivalent of decimal 0.5 (fraction) is commonly:
- A) 0.1₂
- B) 0.01₂
- C) 0.11₂
- D) 1.0₂
34. Which adder can handle carry-in from a previous stage?
- A) Half adder only
- B) Full adder
- C) Neither
- D) XOR gate alone without carry logic
35. POS form is best described as:
- A) Sum of products
- B) Product of sums
- C) Only NAND–NAND without meaning
- D) Gray code listing
36. If A=1, B=0, output of NOR is:
- A) 1
- B) 0
- C) A
- D) Undefined
37. Double complement (A′)′ equals:
- A) 0
- B) 1
- C) A
- D) A′
38. Which device selects one of many data inputs to a single line?
- A) Demultiplexer
- B) Multiplexer
- C) Flip-flop
- D) Counter only
39. Binary 1111 1111₂ as unsigned decimal is:
- A) 127
- B) 255
- C) 256
- D) 128
40. JK flip-flop was introduced mainly to overcome which SR problem?
- A) Slow clocks
- B) Invalid S=R=1 condition / improve usability
- C) Need for binary numbers
- D) Fibre attenuation
Answer Key
- C — 8+4+0+1 = 13.
- A — 16+8+1 = 25 → 11001₂.
- B — 10×16 + 15 = 160+15 = 175.
- A — 101 011 → 5 3 → 53₈.
- A — C₁₆ = 12₁₀ = 1100₂.
- A — Invert each bit: 0100111.
- B — Invert 0101 → 1010; +1 → 1011.
- B — n-bit 2’s complement: −2ⁿ⁻¹ … 2ⁿ⁻¹−1 → −128…127.
- B — De Morgan: complement and change OR to AND.
- C — Absorption law: A + AB = A.
- C — XOR detects difference (odd parity for 2 inputs).
- B — NAND is 0 only for the all-1s input combination.
- C — Both NAND and NOR alone can build any Boolean function.
- A — XNOR is the equality / even-parity for two inputs.
- C — OR with 1 yields 1 (domination).
- B — Canonical SOP is OR of minterms.
- B — Minterms mark where F = 1.
- B — Half adder: Sum = XOR, Carry = AND.
- C — A, B, and Cin.
- B — Three-input XOR gives the sum bit.
- D — S=R=1 is forbidden in a basic cross-coupled SR latch.
- C — J=K=1 toggles the output.
- B — D FF samples D into Q.
- B — T=0 means no toggle (hold).
- B — Racing feedback paths can make the state unpredictable.
- B — 2³ = 8 → three select lines.
- B — DEMUX steers one input to a selected output.
- B — n inputs decode to 2ⁿ outputs → 3-to-8.
- B — Encoder compresses which input is active into a binary code.
- A — 7×8 + 6 = 56+6 = 62.
- D — A · 1 = A, not 0.
- B — AND is Boolean multiplication.
- A — 0.5₁₀ = 1×2⁻¹ = 0.1₂.
- B — Full adder includes Cin.
- B — POS = product (AND) of sum (OR) terms.
- B — NOR(1,0) = NOT(1 OR 0) = 0.
- C — Involution / double negation.
- B — That is the definition of a multiplexer.
- B — Eight 1-bits → 255 unsigned.
- B — JK removes the SR invalid 11 case by defining toggle.