One-Pager — Fundamentals & Architecture (P1 Rank 6)

• Memory hierarchy: Registers → Cache → RAM → Secondary (faster↑ cost↑ size↓ at top)
• 1 Byte = 8 bits; KB→MB→GB→TB→PB (×1024)
• Compiler: whole program → object code; Interpreter: line by line
• CPU: ALU + CU + Registers; Bus: data, address, control
• DMA: I/O without continuous CPU intervention
• ROM non-volatile; RAM volatile
• Cloud: IaaS (infra), PaaS (platform), SaaS (software)

Practice: practice/topic-mcqs/06-fundamentals-architecture.md